OCR A Level Computer Science

1.2.1c: Interrupts, the role of interrupts and Interrupt Service Routines (ISR), role within the Fetch-Decode-Execute Cycle.

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Software and software development

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Keyword	Definition
Fetch-Decode-Execute Cycle	The sequence of steps that the CPU follows to execute a program. The cycle consists of three stages: fetching the next instruction from memory, decoding the instruction to determine its meaning, and executing the instruction. Interrupts can occur at any point in the fetch-decode-execute cycle and cause the CPU to execute an ISR instead of the next instruction in the program.
Interrupt	A signal that interrupts the normal flow of a computer's operations and causes the CPU to execute a special routine called an interrupt service routine (ISR).
Interrupt Service Routine (ISR)	A special routine that is executed by the CPU when an interrupt is received. The ISR typically performs some necessary action and then returns control to the main program.

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