1.1.1b: The Fetch-Decode-Execute Cycle; including its effects on registers.
Keyword | Definition |
---|---|
Decode | the part of the instruction cycle where the instruction in the CIR is split into an opcode and operand and any additional data is loaded from RAM if required by the current instruction |
Execute | the part of the instruction cycle where the ALU carries out the current instruction and saves the result back to RAM or into the ACC |
Fetch | the part of the instruction cycle where the next instruction is read from RAM into the CIR |
opcode | part of an instruction which determines what to do (e.g. add / subtract) |
operand | part of an instruction which specifies what data is required (e.g. what to add / subtract) |