3.1.1: understand the von Neumann stored program concept and the role of main memory (RAM), CPU (control unit, arithmetic logic unit, registers), clock, address bus, data bus, control bus in the fetch-decode-execute cycle
| Keyword | Definition |
|---|---|
| Address bus | set of connections between the CPU and memory which is used to determine which location in memory will be read from or written to |
| Arithmetic Logic Unit | part of the processor which can process binary values (e.g. add, subtract, compare) |
| Clock | binary control signal which synchronises all parts of the CPU as it keeps changing between 0 and 1 |
| Control bus | set of connections which carries binary signals to direct and synchronise all components of a computer |
| Control Unit | part of the processor which sends signals to direct and synchronise other parts of the computer system |
| CPU | central processing unit which fetches, decode and executes instructions |
| Data bus | set of connections which is used to send instructions or data between the CPU and memory |
| Fetch-decode-execute cycle | repeating process where instructions are loaded from memory then run by the CPU |
| RAM | random access memory which stores both instructions and data |
| Register | memory storage location within the processor which is very fast but only large enough to store a single value |
| von Neumann | type of processor design where both instructions and data are stored in the same memory device |
