CPU Simulator

This tool is designed to simulate the registers and busses inside a Von Neumann CPU for students studying for an A Level Computer Science (OCR Exam board)
It's designed as a visual aid to step through each stage of the fetch-decode-execute cycle so that you can see the purpose of each register and bus within the CPU. The structure of the CPU is designed to look similar to the one featured in the Craig'n'Dave videos which uses a binary version of the LMC instruction set


Show values as:
Press the step button to see each stage of the fetch, decode execute cycle
This tool has been put together by P.Dring at Fulford School. Please contact me if you have any questions or spot any bugs